Memory ECC and RAS Engineer

Department    Engineering
Location             Seoul, Korea (On-Site)

Company Overview

Primemas is an early-stage semiconductor company headquartered in the U.S., with an R&D center located in Seoul, Korea. We specialize in designing and developing hub SoC chiplets, which are poised to accelerate computational system development and provide an unprecedented reduction in their production costs. By employing industry-standard high-performance die-to-die interfaces, we support seamless integration with a broad spectrum of application-specific chiplets and ensure applicability across mainstream technological markets, including AI, CXL, data analytics, and more.

At our core, we value innovation and collaboration and are working towards lowering the barrier to faster, cheaper, and more efficient technological development. We are currently growing our team and are looking for talented and motivated individuals of various levels of experience.

About the Role

We are seeking an experienced memory ECC (Error Correction Code) and RAS (Reliability, Availability, and Serviceability) engineer to join our team. In this role, you will be responsible for the design and verification of the ECC and RAS engine, implementing SECDEC/Reed-Solomon ECC as well as error injection and logging functionalities.

Language

Korean or English

Responsibilities

  • SoC ECC/RAS engine design and verification (SECDEC ECC, Reed-Solomon ECC, error injection and logging).

Requirements

  • Bachelor's or Master's degree in Computer Science, Electrical Engineering, or related discipline.
  • 5+ years of RTL design experience using Verilog.
  • Deep understanding of memory systems, especially ECC and RAS-related technologies.
  • Excellent team collaboration and communication skills.

How to Apply

To apply, please send your CV to contact@primemas.com

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