Design Verification Engineer

Department    Engineering
Location             Seoul, Korea (On-Site)

Company Overview

Primemas is an early-stage semiconductor company headquartered in the U.S., with an R&D center located in Seoul, Korea. We specialize in designing and developing hub SoC chiplets, which are poised to accelerate computational system development and provide an unprecedented reduction in their production costs. By employing industry-standard high-performance die-to-die interfaces, we support seamless integration with a broad spectrum of application-specific chiplets and ensure applicability across mainstream technological markets, including AI, CXL, data analytics, and more.

At our core, we value innovation and collaboration and are working towards lowering the barrier to faster, cheaper, and more efficient technological development. We are currently growing our team and are looking for talented and motivated individuals of various levels of experience.

About the Role

We are seeking a talented and motivated Design Verification Engineer to join our team. As a Design Verification Engineer, you will take part in the SoC-level functional verification for Primemas hub SoC chiplets. The role also encompasses close collaboration with the SoC design team on establishing requirements and optimizing specifications for both present and future iterations of Primemas chiplet products.

Language

Korean or English

Responsibilities

• Extract verification features and write verification plans according to the Design Specification.
• Integrate verification IPs (VIPs).
• Code testcases (sequences), scoreboards, and checkers.
  
• Code behavioral models.
• Code functional coverages (covergroup coverage).
• Code coverage analysis and closure.
• Collaborate with SoC hardware design team on setting project requirements and development plans.

Requirements

• Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related discipline.
• Coding experience with SystemVerilog or Verilog.
• Knowledge of AMBA protocols (AXI, AHB, APB).
• Understanding of the concept of OOP (Object Oriented Programming).
• Knowledge of UVM (Universal Verification Methodology).
• Experience developing in Linux environment.

Preferred Qualifications

• 3+ years of design verification experience using UVM.
• Understanding of ARM-based SoC architectures.
• Verification experience with DDR memory sub-systems.
• Verification experience with ARM CPU sub-systems.
• Verification experience with PCIe/CXL sub-systems.
• Experience with UVM environment generation.
• General understanding of chiplet-based solutions and die-to-die interfaces is a plus.

How to Apply

To apply, please send your CV to contact@primemas.com